describe the stages of the fetch-execute cycle
The CPU carries out billions of instructions a second. Each cycle, the CPU fetches an instruction, decodes it to find out what to do and then carries out the instruction (executes it).
This process happens continuously whilst the computer is on and uses a number of registers:
PC - Program Counter
MAR - Memory Address Register
MDR - Memory Data Register
CIR - Current Instruction Register
It also uses the two main units in the CPU; the control unit and the arithmetic logic unit.
During the fetch phase the next instruction address is copied from the PC into the MAR which then fetches the instruction at that location using the address bus. The instruction is held in the MDR register and duplicated into the CIR register. The PC then increments by one.
During the decode stage, the instruction in the CIR is decoded.
Finally the instruction is carried out in the execute stage, the CPU checks for interrupts and the process starts again.
The CPU carries out billions of instructions a second. Each cycle, the CPU fetches an instruction, decodes it to find out what to do and then carries out the instruction (executes it).
This process happens continuously whilst the computer is on and uses a number of registers:
PC - Program Counter
MAR - Memory Address Register
MDR - Memory Data Register
CIR - Current Instruction Register
It also uses the two main units in the CPU; the control unit and the arithmetic logic unit.
During the fetch phase the next instruction address is copied from the PC into the MAR which then fetches the instruction at that location using the address bus. The instruction is held in the MDR register and duplicated into the CIR register. The PC then increments by one.
During the decode stage, the instruction in the CIR is decoded.
Finally the instruction is carried out in the execute stage, the CPU checks for interrupts and the process starts again.
show understanding of ‘register transfer’ notation
To explain what is happening during a CPU cycle we can use register transfer notation (RTN) to show the data and instructions that are being transferred without describing how it is done.
The first register notation you will normally see is when the program counter loads into the memory address register. This is represented as below:
MAR <- [PC]
The data that is being transferred is on the right and the location of where it is going is on the left. The data in the brackets is the data that is being loaded. You will also sometimes see basic arithmetic operations such as +, -, * and /. An example of this is as follows, where the program counter increments to the next memory address.
MAR <- [PC]+1
Another common register transfer is when the memory data register copies its contents to the current instruction register.
CIR <- [MDR]
If a register is written on its own within brackets, it means that it is decoded and executed. For example:
[CIR]
To explain what is happening during a CPU cycle we can use register transfer notation (RTN) to show the data and instructions that are being transferred without describing how it is done.
The first register notation you will normally see is when the program counter loads into the memory address register. This is represented as below:
MAR <- [PC]
The data that is being transferred is on the right and the location of where it is going is on the left. The data in the brackets is the data that is being loaded. You will also sometimes see basic arithmetic operations such as +, -, * and /. An example of this is as follows, where the program counter increments to the next memory address.
MAR <- [PC]+1
Another common register transfer is when the memory data register copies its contents to the current instruction register.
CIR <- [MDR]
If a register is written on its own within brackets, it means that it is decoded and executed. For example:
[CIR]
describe how interrupts are handled
Interrupts are generated by hardware or software and can happen at any time. These occur to tell the CPU that something needs immediate attention. This interrupt will cause the CPU to stop its current task, save its current position, and deal with the interrupt before returning back to the saved program counter. A computer is generally trying to deal with multiple interrupts at the same time. An OS will normally have two programs to handle this. An interrupt handler prioritises the interrupts and stores them in a cue waiting for the CPU to deal with them. A another program called a scheduler deals with which program should have control next. Interrupts allow a computer to run multiple tasks at the same time - otherwise known as multitasking. |
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